In general, in order to reduce the patterning processes for forming layer structures in an array substrate, gray-tone mask or half-tone mask process is generally adopted. A plurality of patterns, for example, structures such as a gate electrode, a gate line, a common electrode and a common electrode line for connecting the common electrode, are formed in the same patterning process, so that the process steps of independently forming the patterns can be simplified. The typical patterning process includes the steps such as film forming, exposure, development, etching and stripping.
For example, transparent electrodes such as common electrodes are usually made from transparent conductive materials with high transmittance such as indium tin oxide (ITO), and metallic electrodes such as gate electrodes, gate lines and common electrode lines are usually made from metallic materials with low resistance such as Cu. Amorphous indium tin oxide (a-ITO) is directly formed in the process of ITO film forming and must be subjected to annealing, so that the a-ITO can be converted into polycrystalline indium tin oxide (p-ITO), and the p-ITO has low electric resistivity and has a transmittance satisfying the design requirement of a display panel. In addition, when the metal material Cu is subjected to annealing, the residual stress can be also eliminated, and the internal structural defects such as deformation and crack tendency can be also reduced.